Friday, November 22, 2024

Synopsys.ai Unveiled as Industry’s First Full-Stack, AI-Driven EDA Suite for Chipmakers

At its annual Synopsys Users Group Silicon Valley Conference, Synopsys, Inc. launched Synopsys.ai, a suite of AI-driven solutions for the design, verification, testing and manufacturing of the most advanced digital and analog chips. For the first time, engineers can now use AI at every stage of chip design, from system architecture to design and manufacturing, and access the solutions in the cloud. Renesas, a leader in the automotive space, is already using Synopsys.ai to shave weeks off product development times with enhanced silicon performance and cost reduction.

Key Highlights:

  • Synopsys.ai provides AI-driven solutions for chip design, with digital and analog, verification, test and manufacturing components.
  • AI engines significantly boost engineering productivity and silicon quality while minimizing costs.
  • NVIDIA, TSMC, IBM, MediaTek and Renesas all support Synopsys’ AI-driven EDA design strategy with significant benefits already being seen:
  • Renesas achieved a 10x improvement in reducing functional coverage holes and up to 30% increase in IP verification productivity.

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At its annual Synopsys Users Group Silicon Valley Conference, Synopsys, Inc. launched Synopsys.ai, a suite of AI-driven solutions for the design, verification, testing and manufacturing of the most advanced digital and analog chips. For the first time, engineers can now use AI at every stage of chip design, from system architecture to design and manufacturing, and access the solutions in the cloud. Renesas, a leader in the automotive space, is already using Synopsys.ai to shave weeks off product development times with enhanced silicon performance and cost reduction.

The Synopsys.ai EDA suite includes AI-driven solutions:

  • Digital design space optimization to achieve power, performance and area (PPA) targets, and boost productivity.
  • Analog design automation for rapid migration of analog designs across process nodes.
  • Verification coverage closure and regression analysis for faster functional testing closure, higher coverage and predictive bug detection.
  • Automated test generation resulting in fewer, optimized test patterns for silicon defect coverage and faster time to results.

“Increased complexity, engineering resource constraints and tighter delivery windows were challenges crying out for a full AI-driven EDA software stack from architectural exploration to design and manufacturing – and we’ve delivered it,” said Shankar Krishnamoorthy, GM of Synopsys EDA Group. “With Synopsys.ai solutions, our customers’ ability to search design solution spaces across multiple domains is in hyperdrive.

SOURCE: PR Newswire

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