GlobalFoundries and advanced on-chip memory innovator RAAAM Memory Technologies have executed a strategic collaboration agreement to co-develop and qualify Gain-Cell RAM (GCRAM) technology. Marking a major technical milestone, the alliance has completed the tape-out of a dedicated GCRAM test chip on GlobalFoundries’ proprietary FDX™ Fully Depleted Silicon-On-Insulator (FD-SOI) manufacturing platform.
The solution addresses the increasing structural limitations in the design of semiconductors. The modern edge AI devices, automotive systems on chips (SoCs), and IoT processors all need large amounts of data to be processed. As a result, on-chip static RAM (SRAM) arrays account for an increasingly larger percentage of total die space.
Redefining On-Chip Power, Performance, and Area (PPA)
By applying RAAAM’s patented GCRAM architecture alongside customized “pushed” design rules on the FDX node, the engineering team co-designed a compact bitcell that achieves a 40% area reduction and up to 60% lower power consumption compared to standard commodity SRAM.
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“The successful tape-out of our GCRAM test vehicle on GF’s FDX platform is a testament to the powerful synergy between RAAAM’s memory innovations and GlobalFoundries’ manufacturing excellence,” said Robert Giterman, CEO and co-founder of RAAAM Memory Technologies. “Our GCRAM technology allows semiconductor companies to significantly increase their on-chip memory capacity or reduce the silicon area while keeping the same amount of on-chip memory, while the ultra-low leakage of FD-SOI technology extends data retention, enabling designers to unlock substantial energy savings for edge AI devices”.
“At GlobalFoundries, we are continuously pushing the boundaries of what is possible on our FDX platform and keep enhancing our IP offering to meet our customers’ needs,” said Sudipto Bose, vice president of FD-SOI product management at GlobalFoundries. “Partnering with RAAAM Memory Technologies allows us to offer our customers an incredibly compelling on-chip memory solution that redefines the power-performance-area (PPA) equation for advanced AI and other applications”.
Semiconductor Ecosystem Validation
The joint initiative has drawn attention from key semiconductor players, including NXP Semiconductors, which is evaluating the solution for edge-computing applications.
“The industry needs a paradigm shift in on-chip memory. The GCRAM solution developed by RAAAM and GF offers immense potential,” said Victor Wang, VP of front end innovation at NXP Semiconductors. “The projected area shrink and power reductions provide a clear path to increasing on-chip memory capacities, which is vital for reducing off-chip data movement and driving greater system-level efficiency”.
Strategic Market Positioning
The joint tape-out provides chip designers with an efficient alternative to legacy SRAM, enabling expanded on-chip cache without expanding die size or thermal budgets. By minimizing off-chip memory access, the GCRAM platform on FDX technology reduces bus latency and lowers system energy requirements for high-density edge computing ecosystems.
