Avicena, a privately held company in Mountain View, CA, is demonstrating its LightBundleTM multi-Tbps chip-to-chip interconnect technology at the European Conference for Optical Communications (ECOC) 2022 in Basel, Switzerland
“Here at ECOC 2022 we are demonstrating individual microLED links running at 14Gbps. Compact, low-cost interconnects using hundreds of these links can support many terabits per second.”
Interconnects have become the key bottleneck in modern compute and networking systems. Highly variable workloads are driving the evolution of densely interconnected, heterogeneous, software-defined clusters of XPUs, Smart NICs, hardware accelerators, and high-performance shared memory. Ever growing Artificial Intelligence (AI)/Machine Learning (ML) and High-Performance Computing (HPC) workloads are driving the need for interconnects with ultra-high bandwidth density, ultra-low power consumption, and low latency.
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“We have already demonstrated LightBundleTM links running at less than 1pJ/bit,” says Bardia Pezeshki, founder and CEO of Avicena, “Here at ECOC 2022 we are demonstrating individual microLED links running at 14Gbps. Compact, low-cost interconnects using hundreds of these links can support many terabits per second.” LightBundleTM is based on arrays of innovative GaN microLEDs that leverage the microLED display ecosystem and can be integrated directly onto high performance CMOS ICs. Each microLED array is connected via a multi-core fiber cable to a matching array of CMOS-compatible PDs.
“We have just closed our Series A funding with a distinguished group of existing and new investors,” continues Bardia Pezeshki. “And we will use the new funds to scale our team and build initial products for our growing family of partners and customers.”
Today’s high-performance ICs use SerDes-based electrical links to achieve adequate IO density. However, the power consumption and bandwidth density of these electrical links degrade quickly with length. Conventional optical communications technologies developed for networking applications have been impractical for inter-processor and processor-memory interconnects due to their low bandwidth density, high power consumption, and high cost. Moreover, co-packaging existing laser sources with hot ASICs does not fit well for reliability reasons unless external laser sources (ELS) are used which increases complexity and cost.