OpenLight, which is an enabler of heterogeneous III-V on silicon photonic integration and customized Photonic Application Specific Integrated Circuits (PASICs), and Tower Semiconductor, which is a foundry for value-added analog semiconductor solutions, have unveiled the launch of OpenLight’s Process Design Kit (PDK) for Tower’s PH18DA InP on silicon platform within the Cadence EDA software.
With the joint technical achievement, OpenLight’s innovative photonics intellectual property, Tower’s mass production silicon technologies, and Cadence’s renowned EDA platforms have been combined. With the direct integration of photonic technology in electronic IC designs, the PH18DA platform is enabling semiconductor engineering teams to design, simulate, and manufacture next-generation PICs.
Streamlining Electro-Optical Design Workflows
Historically, designing optical components required specialized tools detached from conventional electronic integrated circuit (EIC) workflows. The new CAD-integrated PDK resolves this friction, allowing engineers to lay out and verify complex optical chips alongside traditional silicon electronics.
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“By making our PDK available on Cadence tools, we enable customers to design photonic integrated circuits within the same environment they rely on for advanced IC development,” said Dr. Adam Carter, CEO at OpenLight. “This integration simplifies adoption and strengthens the path from design to production on the PH18DA platform.”
Monolithic Active Integration for AI Infrastructure and High-Speed Networks
Circuits developed using the OpenLight PDK are tailored for fabrication on Tower’s PH18DA InP-on-silicon process. This manufacturing architecture allows active photonic components-such as optical amplifiers, modulators, and on-chip lasers-to be integrated monolithically onto a single silicon substrate.
The unified manufacturing pathway serves high-bandwidth applications, including AI cluster interconnects, high-density data center optical transceivers, and advanced optical sensing systems.
“In collaboration with Cadence and OpenLight, we are advancing design capabilities on the PH18DA platform through a new capability that integrates expertise across technology, IP, and EDA,” said Dr. Samir Chaudhry, vice president of customer design enablement and reliability at Tower Semiconductor. “This approach enables customers to streamline development of 400G and 1.6T laser-integrated photonic integrated circuits, while achieving co-optimized PIC and EIC designs for improved performance, power efficiency, and scalability necessary for next-generation near- and co-packaged optics (NPO/CPO) solutions.”
“Adding the OpenLight PDK PH18DA manufactured by Tower Semiconductor to the rich portfolio of photonics processes supported by the Cadence Photonics ecosystem is a key milestone because it marks the introduction of integrated active devices for high-performance, co-optimized electro-optical designs,” said Gilles Lamant, distinguished engineer, Cadence.
Unlocking High-Efficiency Electro-Optical Co-Optimization
By bridging active III-V optical materials with standard silicon manufacturing and Cadence EDA tools, the combined solution equips chip designers to address thermal, power, and bandwidth bottlenecks in modern AI data center infrastructure. The integration offers a repeatable, scalable pathway from initial circuit design to mass production on Tower’s commercial foundry line.