Keysight Technologies, Inc., a leading technology company that delivers advanced design and validation solutions to help accelerate innovation to connect and secure the world, announced it has extended its collaboration with Synopsys with the integration of PathWave RFIC Design (GoldenGate) with Synopsys Custom Compiler™ design environment and Synopsys PrimeSim™ circuit simulation solutions. This will enable designers to validate complex radio frequency (RF) and millimeter wave design requirements for 5G/6G system-on-chip (SoC) and subsystem designs in the Synopsys Custom Design Family.
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“Keysight’s RFIC design tool integrated with Custom Compiler provides best-in-class layout and simulation capabilities to design and verify our millimeter-wave radar chips. We anticipate that the Synopsys-Keysight collaboration will save us time versus the maintenance of our in-house developed tools.”
“We are migrating our RF design environment to industry-leading commercial tools and workflows based on the Synopsys Custom Compiler™ design and layout solution,” said Koji Tomioka, vice president at Asahi Kasei Microdevices Corporation. “Keysight’s RFIC design tool integrated with Custom Compiler provides best-in-class layout and simulation capabilities to design and verify our millimeter-wave radar chips. We anticipate that the Synopsys-Keysight collaboration will save us time versus the maintenance of our in-house developed tools.”
The complexity of design requirements for radio frequency integrated circuits (RFICs) that are used for wireless data transmission, such as transceivers and RF front-end components, continues to grow. Next-generation wireless systems target a range of new capabilities including higher bandwidth, more connected devices, lower latency and better coverage. To address these requirements, designers need to simulate and measure RF performance to a greater level of accuracy.
The integration of PathWave RFIC Design (GoldenGate) simulation software, which models complex integrated circuits, with Synopsys Custom Compiler, part of the Synopsys Custom Design Family of products, addresses this challenge by enabling designers to achieve power and performance optimizations and efficiently deliver 5G and 6G designs.
“Native integration of Keysight’s PathWave RFIC Design (GoldenGate) with Synopsys’ Custom Compiler extends our collaboration to address end-to-end workflows for increasingly complex wireless designs,” said Niels Faché, vice president and general manager of Keysight’s PathWave Software Solutions. “This integration enables customers to access Harmonic Balance and Envelope simulation capabilities, as well as Keysight’s Virtual Test Benches, to reliably compute error vector magnitude and adjacent channel power ratio early in the chip design and verification process.”