NASA’s Jet Propulsion Laboratory in Southern California has selected Microchip Technology Inc. of Chandler, Arizona, to develop a High-Performance Spaceflight Computing (HPSC) processor that will provide at least 100 times the computational capacity of current spaceflight computers. This key capability would advance all types of future space missions, from planetary exploration to lunar and Mars surface missions.
“This cutting-edge spaceflight processor will have a tremendous impact on our future space missions and even technologies here on Earth,” said Niki Werkheiser, director of technology maturation within the Space Technology Mission Directorate at NASA Headquarters in Washington. “This effort will amplify existing spacecraft capabilities and enable new ones and could ultimately be used by virtually every future space mission, all benefiting from more capable flight computing.”
Microchip will architect, design, and deliver the HPSC processor over three years, with the goal of employing the processor on future lunar and planetary exploration missions. Microchip’s processor architecture will significantly improve the overall computing efficiency for these missions by enabling computing power to be scalable, based on mission needs. The design also will be more reliable and have a higher fault tolerance. The processor will enable spacecraft computers to perform calculations up to 100 times faster than today’s state-of-the-art space computers. As part of NASA’s ongoing commercial partnership efforts, the work will take place under a $50 million firm-fixed-price contract, with Microchip contributing significant research and development costs to complete the project.
“We are pleased that NASA selected Microchip as its partner to develop the next-generation space-qualified compute processor platform.” said Babak Samimi, corporate vice president for Microchip’s Communications business unit. “We are making a joint investment with NASA on a new trusted and transformative compute platform. It will deliver comprehensive Ethernet networking, advanced artificial intelligence/machine learning processing and connectivity support while offering unprecedented performance gain, fault-tolerance, and security architecture at low power consumption. We will foster an industry wide ecosystem of single board computer partners anchored on the HPSC processor and Microchip’s complementary space-qualified total system solutions to benefit a new generation of mission-critical edge compute designs optimized for size, weight, and power.”