Efinix Inc. has introduced the Sapphire RV64 SoC, a 64-bit RISC-V processor core designed to provide embedded developers with higher performance, configurable processing and low-power operation in FPGA-based systems. Built on the RISC-V Instruction Set Architecture, the new SoC expands Efinix’s Sapphire portfolio for applications that have exceeded the performance, memory, cache and I/O capabilities of 32-bit embedded processors, particularly in embedded Linux and edge AI environments. “Sapphire RV64 was designed so customers already using our 32-bit Sapphire SoCs can scale up without re-architecting their systems,” said Tony Ngai, co-founder, Co-President, and CTO of Efinix. “It carries forward the same configurable, FPGA-native approach, but now with larger addressable memory, caching, and debug capability that 64-bit embedded Linux and AI workloads demand.”
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Sapphire RV64 features a seven-stage pipeline supporting the RISC-V64IM ISA, optional instruction extensions, up to 512 KB of on-chip RAM, multi-way L1 instruction and data caches, and optional L2 cache and branch prediction. It also supports DDR3, HyperRAM and LPDDR4x memory at speeds up to 3,200 Mbps, along with an optional SV39 memory management unit for Linux. “Customers building increasingly sophisticated embedded and edge AI systems have been asking us for a path to 64-bit processing without giving up the low power and configurability that made Sapphire successful,” said Mark Oliver, Vice President of Marketing at Efinix. The new core also retains custom instruction capabilities for FPGA acceleration.
