Allegro MicroSystems has introduced the A81415, the industry’s first ASIL-D-certified Power Management IC (PMIC) with an integrated wheel-speed sensor interface, designed to simplify next-generation brake-by-wire systems for software-defined vehicles. The single-chip solution combines power management and wheel-speed sensing, eliminating the need for separate safety PMICs, decoder ICs and multiple discrete components that traditionally increase cost, board space and potential failure points. Featuring an on-chip wheel-speed sensor interface supporting standard 2-level, PWM and 3-level AK protocols, the A81415 integrates a buck-boost pre-regulator, five low-dropout regulators and a single-inductor architecture, removing up to nine external components and delivering semiconductor bill-of-material savings of up to $4 per vehicle.
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The compact design also frees more than 50% of usable board space while reducing latency by internally processing wheel-speed data and sharing it through an SPI interface, enabling faster braking response and improved MCU efficiency. Built on Allegro’s automotive grade-0 process, the device supports both 12V and 48V architectures and, when paired with the APM81815 pre-regulator and 48V gate drivers, provides a complete fail-operational chipset for modern corner modules. “Intelligent chassis systems demand that sensing and power electronics at the wheel act as one,” said Peter Wells, Business Line Director, High Performance Power at Allegro MicroSystems. “Allegro combined our wheel-speed sensing leadership and high-reliability power management expertise into our new PMIC to give our customers a simpler, safer and highly scalable foundation for modern vehicle brake-by-wire.”