Deca Technologies and Silicon Storage Technology (SST), a subsidiary of Microchip Technology, announced that they have entered into a strategic agreement to innovate a comprehensive non-volatile memory (NVM) chiplet package to facilitate customer adoption of modular, multi-die systems.
This collaboration combines Deca’s M-Series™ fan-out and Adaptive Patterning® technologies with SST’s industry-leading SuperFlash® embedded flash technology. The companies are applying their system-level integration expertise to deliver a bundled offering that empowers customers to design, verify and commercialize NVM chiplets. By enabling greater architectural flexibility, the solution offers both technical and commercial advantages over traditional monolithic integration.
The collaborative solution provides a modular, memory-centric foundation for advanced multi-die architectures by combining the strengths of both companies. The chiplet package leverages SST’s SuperFlash technology, along with the interface logic and physical design elements required to function as a self-contained chiplet. This is paired with Adaptive Patterning-based redistribution layer (RDL) design rules, simulation flows, test strategies and manufacturing paths through Deca’s ecosystem of qualified partners.
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Building on this foundation, Deca and SST will jointly support customers from early design through qualification and prototype manufacturing. By streamlining integration and accelerating design cycles, the companies aim to enable broader adoption of heterogeneous integration, engaging with customers globally to bring chiplet solutions to market.
“Chiplet integration is reshaping how the industry thinks about performance, scalability and time to market,” said Robin Davis, VP of Strategic Engagements & Applications at Deca. “Our partnership with SST empowers customers to develop a chiplet solution that combines different chips, process nodes, sizes and even die from multiple foundries delivering more efficient and cost-effective products.”
Chiplet technology offers significant advantages in semiconductor design and manufacturing by enabling a more-than-Moore approach. Designers can go beyond traditional scaling to deliver enhanced functionality and performance and get products to market faster. Chiplets allow the reuse of existing IP and can facilitate the mixing of advanced process nodes with less expensive legacy geometries. By utilizing the most appropriate die technology for a particular function, chiplets provide a versatile, efficient and economical pathway for advanced semiconductor innovation.
“As our customers push the boundaries of Moore’s Law, they are expressing greater interest in chiplet-based solutions,” said Mark Reiten, Vice President of Microchip’s licensing business unit. “This partnership aims to deliver a comprehensive package of IP, simulation tools and advanced assembly and engineering services necessary for successful chiplet development and productization.”
SOURCE: GlobeNewswire