As the global artificial intelligence economy shifts rapidly from model training to large-scale inference deployment, the semiconductor industry faces an acute physical challenge known as the memory wall. Modern large language models (LLMs) demand immense bandwidth positioned close to compute cores to process tokens efficiently. However, while High Bandwidth Memory (HBM) offers extraordinary speed, its capacity limitations and high costs create severe economic barriers for hyperscale AI deployment. Conversely, conventional NVMe Solid State Drives (SSDs) deliver massive storage density but suffer from throughput bottlenecks that stall high-speed inference processing.
To eliminate this memory tier gap, flash memory pioneer SanDisk Corporation and memory leader SK hynix Inc. announced the release of the first official High Bandwidth Flash (HBF™) technical specification through the Open Compute Project (OCP).
Published six months after the OCP HBF workstream was established in February, the open specification establishes a technical framework for integrating high-density 3D NAND flash directly into near-compute memory hierarchies. Hyperscale AI giant Google and AI processor innovator Tenstorrent joined the alliance as core consortium members, validating the specification against real-world data center workloads.
A Universal Blueprint for High Bandwidth Flash
The OCP HBF specification provides chip designers and data center operators with an open framework to integrate HBF alongside HBM and conventional DRAM. By establishing electrical, physical, and protocol guidelines, the alliance enables AI accelerator designers to build flexible systems that increase near-compute memory capacity while lowering total cost of ownership (TCO).
Key technical highlights of the open OCP HBF specification include:
UCIe Interconnect Standardization: Utilizes the Universal Chiplet Interconnect Express (UCIe) interface, allowing HBF modules to connect seamlessly with GPUs, CPUs, and custom ASICs.
Massive Near-Compute Density: Defines 8-layer and 16-layer 3D NAND stacking configurations delivering up to 512GB of capacity per stack—providing up to 16x the capacity of HBM stacks at lower costs.
Multi-Grade Bandwidth Performance: Establishes three performance tiers delivering data throughput from 0.4 TB/s up to 3.0 TB/s, bringing flash storage into near-memory performance thresholds.
Open Ecosystem Alignment: Published under the Open Compute Project framework to position HBF as the de facto standard across data centers, preventing vendor lock-in.
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“AI inference is creating a new set of memory requirements, and HBF technology is designed to meet that moment,” stated Alper Ilkbahar, Chief Technology Officer at SanDisk.
Impact on the Semiconductor Industry
The release of the HBF specification by SanDisk, SK hynix, Google, and Tenstorrent marks a major structural evolution across the Semiconductors sector:
1. Redefining the Global AI Memory Hierarchy
Historically, the memory hierarchy was divided between volatile DRAM/HBM and non-volatile NAND flash drives. The standardization of HBF establishes Tiered Near-Compute Storage. Positioning 3D NAND within a high-speed UCIe interconnect envelope creates an intermediate layer that absorbs massive LLM parameter weights, reducing expensive HBM capacity demands while eliminating PCIe storage bus bottlenecks.
2. Accelerating UCIe Chiplet Ecosystem Adoption
Integrating HBF technology via UCIe host interfaces provides a commercial catalyst for advanced packaging and chiplet integration. As memory makers stack 375-layer 4D NAND dies alongside logic dies, the supply chain will see increased capital expenditure toward advanced silicon interposers and 3D chiplet packaging.
Overall Effects on Businesses Operating in the Sector
For hyperscale cloud providers, AI silicon startups, and enterprise OEMs, the standardized HBF platform delivers direct strategic benefits:
Lowering Capital Expenditure for AI Deployments: Integrating lower-cost 3D NAND into near-compute tiers allows cloud providers like Google to serve multi-billion parameter LLMs at lower capital costs per query.
Leveling the Playing Field for Startups: Open UCIe-compliant HBF specifications enable non-traditional chipmakers (such as Tenstorrent) to design high-performance AI inference accelerators without building custom memory controllers.
Creating New Revenue Streams for Foundries: The emergence of HBF provides NAND flash manufacturers with a high-margin product category, reducing exposure to consumer SSD price cycles.
Conclusion
The release of the first OCP High Bandwidth Flash specification by SanDisk and SK hynix represents a defining moment for semiconductor architecture. By combining high-density 3D NAND flash with near-memory bandwidth and open UCIe chiplet connectivity, these industry leaders are dismantling the AI memory wall. For the semiconductor industry, this milestone confirms that the future of scalable AI computing belongs to open, tiered memory architectures capable of delivering massive intelligence at scale.